/**
 @file sys_usw_dmps_shared_api.h

 @author  Copyright (C) 2022 Centec Networks Inc.  All rights reserved.

 @date 2022-10-25

 @version v1.0

*/

#ifndef _SYS_USW_DMPS_SHARED_API_H
#define _SYS_USW_DMPS_SHARED_API_H
#ifdef __cplusplus
extern "C" {
#endif

#include "sys_usw_dmps_reg.h"
#include "sys_usw_dmps_shared_reg.h"
#include "sys_usw_dmps_api.h"
#include "stdarg.h"


enum sys_dmps_shared_api_cfg_list_e
{
    QUAD_SGMAC_RX_BUF_MODE,
    QUAD_SGMAC_TX_BUF_MODE,
    SGMAC0_TX_OUTPUT_WIDTH,
    SGMAC0_RX_INPUT_WIDTH,
    SGMAC0_TX_KEEP_TS_EN,
    SGMAC1_TX_OUTPUT_WIDTH,
    SGMAC1_RX_INPUT_WIDTH,
    SGMAC1_TX_KEEP_TS_EN,
    SGMAC2_TX_OUTPUT_WIDTH,
    SGMAC2_RX_INPUT_WIDTH,
    SGMAC2_TX_KEEP_TS_EN,
    SGMAC3_TX_OUTPUT_WIDTH,
    SGMAC3_RX_INPUT_WIDTH,
    SGMAC3_TX_KEEP_TS_EN,
    SGMAC0_TX_WAIT_CAPTURE_TS,
    SGMAC1_TX_WAIT_CAPTURE_TS,
    SGMAC2_TX_WAIT_CAPTURE_TS,
    SGMAC3_TX_WAIT_CAPTURE_TS,
    SHARED_MII0_SPEED,
    SHARED_MII0_FX_MODE,
    SHARED_MII0_TX_PACE_DEC_VALUE,
    SHARED_MII0_TX_PACE_INC_VALUE,
    SHARED_MII0_TX_REPLICATE_CNT,
    SHARED_MII0_TX_REPLICATE_SLOT,
    SHARED_MII0_RX_SAMPLE_CNT,
    SHARED_MII0_RX_SAMPLE_SLOT,
    SHARED_MII0_TX_RS_FEC_EN,
    SHARED_MII0_TX_AM_INTERVAL,
    SHARED_MII0_SPEED_RX,
    SHARED_MII0_TX_AFULL_THRD,
    SHARED_MII0_USGMII_EN,
    SHARED_MII0_USXGMII_EN,
    
    SHARED_MII_RXAUI_MODE,
    SHARED_MII_XAUI_MODE,
    SHARED_MII_QSGMII_MODE,
    SHARED_MII_MUX_MODE,
    SHARED_MII_TX_IPG_DEL_INTERVAL,
    
    SHARED_PCS_CG_MODE,
    SHARED_PCS_FX_MODE0,
    SHARED_PCS_FX_MODE1,
    SHARED_PCS_FX_MODE2,
    SHARED_PCS_FX_MODE3,
    SHARED_PCS_LG_MODE0,
    SHARED_PCS_LG_MODE1,
    SHARED_PCS_XLG_MODE,
    SHARED_PCS_XXVG_MODE0,
    SHARED_PCS_XXVG_MODE1,
    SHARED_PCS_XXVG_MODE2,
    SHARED_PCS_XXVG_MODE3,
    SHARED_PCS_SGMII_MODE_TX0,
    SHARED_PCS_SGMII_MODE_TX1,
    SHARED_PCS_SGMII_MODE_TX2,
    SHARED_PCS_SGMII_MODE_TX3,
    SHARED_PCS_SGMII_MODE_RX0,
    SHARED_PCS_SGMII_MODE_RX1,
    SHARED_PCS_SGMII_MODE_RX2,
    SHARED_PCS_SGMII_MODE_RX3,
    SHARED_PCS_UNIDIR0,
    SHARED_PCS_UNIDIR1,
    SHARED_PCS_UNIDIR2,
    SHARED_PCS_UNIDIR3,
    SHARED_PCS_SERDES_RX_POP_CNT,

    SHARED_PCSFEC_XFI_FEC_EN,

    SYS_DMPS_SHARED_API_CFG_MAX,
};
typedef enum sys_dmps_shared_api_cfg_list_e sys_dmps_shared_api_cfg_list_t;


#define DMPS_SHARED_API sys_usw_dmps_shared_api

extern int32
sys_usw_dmps_shared_api(uint8 p_api, uint8 lchip, sys_dmps_mac_api_db_t* p_api_db, ...);


#ifdef __cplusplus
}
#endif

#endif

